Implementation of a parallel DFE using residue number system

A parallel decision feedback equalizer (DFE) implementation using residue number system (RNS) is considered When the DFE implementation for a system requires a wide input data width and high sampling rates, RNS provides a speed advantage over conventional approaches. This speed advantage can be obtained without an overall increase in hardware complexity. We present the results of our initial feasibility study implementing a DFE using RNS. A comparison of RNS and conventional approaches is given in terms of gate counts and gate delays