Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

Author

Cao, Yu ; Huang, Xuejue ; Sylvester, Dennis ; King, Tsu-Jae ; Hu, Chenming

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

2002

fDate

25-28 Sept. 2002

Firstpage

438

Lastpage

442

Abstract

On-chip interconnects exhibit clear frequency-dependence in both resistance and inductance. A compact ladder circuit model is developed to capture this behavior, and we examine its impact on digital and RF circuit design. It is demonstrated that the use of DC values for R and L is sufficient for delay analysis, but RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.

Keywords

Q-factor; SPICE; circuit simulation; circuit stability; electric resistance; electromagnetic shielding; equivalent circuits; inductance; inductors; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; ladder networks; logic design; radiofrequency integrated circuits; Q factor; RF inductor performance; RL frequency dependence; SPICE; compact ladder circuit models; delay analysis; digital/RF circuit design; equivalent circuits; noise shielding; on-chip interconnect frequency-dependent resistance/inductance; on-chip spiral inductors; power supply stability; shield line insertion; signal integrity analysis; Circuit synthesis; Delay; Frequency dependence; Inductance; Integrated circuit interconnections; Performance analysis; Power supplies; RF signals; Radio frequency; Signal analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2002. 15th Annual IEEE International

Print_ISBN

0-7803-7494-0

Type

conf

DOI

10.1109/ASIC.2002.1158099

Filename

1158099