Title :
Performance analysis of mixed asynchronous synchronous systems
Author :
Teich, J. ; Sriram, S. ; Thiele, L. ; Martin, M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
The paper is concerned with the timing analysis of a class of digital systems called mixed asynchronous-synchronous systems. In such a system, each computation module is either synchronous (i.e. clocked) or asynchronous (i.e. selftimed). The communication between modules is assumed to be selftimed for all modules. We introduce a graph model called MASS for describing the timing behaviour of such architectures. The graph contains two kinds of nodes, synchronous and asynchronous nodes. The operation model of a MASS is similar to that of a timed marked graph, however, additional schedule constraints are imposed on synchronous nodes: A synchronous node can only fire at ticks of its local module clock. We analyze the behaviour of MASS, in particular period, periodicity and maximal throughput rate
Keywords :
digital systems; MASS; asynchronous nodes; clocked modules; computation module; digital systems; graph model; local module clock; maximal throughput rate; mixed asynchronous synchronous systems; performance analysis; periodicity; schedule constraints; selftimed modules; synchronous nodes; timed marked graph; timing analysis; Circuits; Clocks; Computer architecture; Computer interfaces; Delay; Digital systems; Hardware; Performance analysis; Throughput; Timing;
Conference_Titel :
VLSI Signal Processing, VII, 1994., [Workshop on]
Conference_Location :
La Jolla, CA
Print_ISBN :
0-7803-2123-5
DOI :
10.1109/VLSISP.1994.574735