DocumentCode
2908089
Title
An implemented of H.264 video decoder using hardware and software
Author
Park, SeongMo ; Cho, HanJin ; Jung, Heebum ; Lee, Dukdong
Author_Institution
Basic Res. Lab., ETRI, Taejeon
fYear
2005
fDate
21-21 Sept. 2005
Firstpage
271
Lastpage
275
Abstract
In this paper, we present a design of video single chip decoder for portable multimedia application. The single- chip called as A-MoVa (advanced mobile video ASIC). This chip has mixed hardware/software architecture to combine performance and flexibility. We designed by using the partition between hardware and software block. We developed the architecture of H.264 decoder based on SoC platform. This chip contains 290,000 gates of logics, 670,000 gates of memories and the chip size was 7.5 mm times 7.5 mm which was fabricated using 0.25 micron 4-layers metal CMOS technology
Keywords
CMOS digital integrated circuits; digital signal processing chips; hardware-software codesign; system-on-chip; video coding; 0.25 micron; CMOS technology; H.264 video decoder; SoC platform; advanced mobile video ASIC; hardware blocks; mixed hardware-software architecture; portable multimedia application; software blocks; video single chip decoder; Application software; CMOS logic circuits; CMOS technology; Computer architecture; Costs; Decoding; Energy consumption; Hardware; Reduced instruction set computing; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Conference_Location
San Jose, CA
Print_ISBN
0-7803-9023-7
Type
conf
DOI
10.1109/CICC.2005.1568659
Filename
1568659
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