DocumentCode :
2908877
Title :
Application of VHDL in test program development
Author :
Sacher, Eric
Author_Institution :
Serendipity Syst. Inc., Sedona, AZ, USA
fYear :
1998
fDate :
24-27 Aug 1998
Firstpage :
14
Lastpage :
21
Abstract :
Writing functional test programs has been a pervasive task since the inception of computer controlled testing in the early seventies. Software tools have been developed, such as simulators and testability analyzers, to assist with the test programming tasks. With the advent of today´s high density circuitry, we have reached a practical application limit in utilizing these vintage tools on today´s products. This paper describes a test programming paradigm based on VHDL and its application in a VHDL-based simulation tool set
Keywords :
application specific integrated circuits; automatic test software; fault diagnosis; hardware description languages; integrated circuit testing; VHDL; computer controlled testing; functional test programs; high density circuitry; simulation tool set; test program development; test programming; testability analyzers; Circuit faults; Circuit simulation; Costs; Government; Hardware design languages; Instruments; Product design; Programming profession; Software tools; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AUTOTESTCON '98. IEEE Systems Readiness Technology Conference., 1998 IEEE
Conference_Location :
Salt Lake City, UT
ISSN :
1088-7725
Print_ISBN :
0-7803-4420-0
Type :
conf
DOI :
10.1109/AUTEST.1998.713414
Filename :
713414
Link To Document :
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