Research and measurement of chip current imbalance in IGBT module with multiple chips in parallel

The current sharing of the chips in parallel is one of the key points of the layout design of IGBT module. The current imbalance of the chips leads to imbalance losses and temperature, and increases the failure of the chip with highest temperature, so attention should be paid during the IGBT module design. In this paper, the asymmetric stray parameters of the circuit in parallel and the coupling between the gate circuit and the power circuit are analyzed by the equivalent circuit method, but the simulation results and the experimental results show that the stray inductances and resistances, extracted at the fixed frequency, can´t reflect the electrical behaviors of the power and gate circuit. A method to extract the stray parameters is proposed in this paper, which can be used to reflect the current imbalance of the switching and conducting behaviors.