DocumentCode
2910705
Title
Cosimulation of ITRON-based embedded software with SystemC
Author
Chikada, Shin-ichiro ; Honda, Shinya ; Tomiyama, Hiroyuki ; Takada, Hiroaki
Author_Institution
Graduate Sch. of Inf. Sci., Nagoya Univ., Japan
fYear
2005
fDate
30 Nov.-2 Dec. 2005
Firstpage
71
Lastpage
76
Abstract
This paper presents an RTOS-centric timed cosimulation with SystemC for embedded system design. In our cosimulation environment, a SystemC simulator and an RTOS kernel model are communicated and synchronized with each other. Our experiment using a JPEG decoder example demonstrates an improvement in cosimulation speed over traditional HDL-based cosimulation.
Keywords
C++ language; digital simulation; embedded systems; hardware-software codesign; image coding; operating system kernels; synchronisation; ITRON based embedded software; JPEG decoder; RTOS kernel model; RTOS-centric timed cosimulation; SystemC simulator; embedded system design; real time operating systems; Application software; Computational modeling; Concurrent computing; Decoding; Embedded software; Embedded system; Hardware design languages; Information science; Information technology; Kernel;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Level Design Validation and Test Workshop, 2005. Tenth IEEE International
ISSN
1552-6674
Print_ISBN
0-7803-9571-9
Type
conf
DOI
10.1109/HLDVT.2005.1568816
Filename
1568816
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