Title :
Progress in silicon etching by in-situ dc microplasmas
Author :
Wilson, C.G. ; Gianchandani, Y.B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Abstract :
This paper reports on the etching of Si using spatially confined SF/sub 6/ microplasmas that are generated by applying a DC bias across a metal-polyimide-metal electrode stack patterned on a sample substrate. The typical operating pressure and power density are in the range of 1-20 Torr and 1-10 W/cm/sup 2/, respectively. The plasma confinement can be varied from <100 /spl mu/m to >1 cm by variations in the electrode area, operating pressure, and power. Etch rates of 4-17 /spl mu/m/min have been achieved. The etch rate per unit power density increases with increasing pressure, while the plasma resistance decreases with increasing power density. In a shared anode configuration, which is suitable for small feature sizes, reducing the trench width from 106 /spl mu/m to 6 /spl mu/m reduces the etch rate by 14%. Numerical modeling is used to correlate variations in the local electric fields to measured trends in the etch rate and asymmetry in the etch profile.
Keywords :
elemental semiconductors; plasma confinement; silicon; sputter etching; 1 to 20 torr; DC bias; SF/sub 6/; Si; electrode area; etch rate; etching; local electric fields; metal-polyimide-metal electrode stack; numerical modeling; operating pressure; plasma confinement; plasma resistance; power density; shared anode configuration; spatially confined SF/sub 6/ microplasmas; trench width; Anodes; DC generators; Electric resistance; Electrodes; Etching; Plasma applications; Plasma confinement; Plasma density; Plasma measurements; Silicon;
Conference_Titel :
Micro Electro Mechanical Systems, 2001. MEMS 2001. The 14th IEEE International Conference on
Conference_Location :
Interlaken, Switzerland
Print_ISBN :
0-7803-5998-4
DOI :
10.1109/MEMSYS.2001.906470