Title :
An equalizing and channel coding processor for GSM terminals
Author :
Okamoto, Minoru ; Ishikawa, Toshihiro ; Marui, S. ; Yamasaki, Masayuki ; Ueda, Katsuhiko ; Asano, Nobuo ; Uesugi, Mitsuru ; Saitoh, Yoshiko ; Fujimoto, Yukihiro ; Furushima, Susumu
Author_Institution :
Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
Abstract :
A new DSP architecture for equalizing, channel coding/decoding and encryption/decryption required by GSM hand portable terminals is presented. In the DSP, called EQCHAN (equalizer and channel coding/decoding processor), these tasks are managed in common units, that is, the data processing unit (DPU) and the bit manipulation unit (BMU). The LSI that contains EQCHAN was designed using 0.8 μm CMOS technology and its die size is 123 mm2. The power consumed in the LSI is 60 mW at 3.6 V under a continuous communication mode and this value is sufficient for a portable terminal. We describe the detail architecture of EQCHAN
Keywords :
CMOS digital integrated circuits; cellular radio; channel coding; decoding; digital radio; digital signal processing chips; encoding; equalisers; land mobile radio; large scale integration; telecommunication computing; telecommunication terminals; 0.8 μm CMOS technology; 0.8 micron; 3.6 V; 60 mW; DSP architecture; GSM hand portable terminals; LSI; architecture; bit manipulation unit; channel coding processor; channel coding/decoding processor; continuous communication mode; data processing unit; die size; equalizer; power consumption; CMOS technology; Channel coding; Cryptography; Digital signal processing; GSM; Large scale integration; Logic circuits; Mobile handsets; RF signals; Timing;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1995. ICASSP-95., 1995 International Conference on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-2431-5
DOI :
10.1109/ICASSP.1995.479569
