A low-power 2 GHz discrete time weighting system dedicated to Sampled Analog Signal Processing

Author

Abiven, Y. ; Rivet, F. ; Deval, Y. ; Dallet, D. ; Belot, D. ; Taris, T.

Author_Institution

IMS Lab., Univ. of Bordeaux, Talence, France

fYear

2011

fDate

11-14 Dec. 2011

Firstpage

57

Lastpage

60

Abstract

Multi-standard applications encounter several developments in the wireless systems. A single receiver is required for any standard of communication. Software Radio (SR) is an illustration of this concept. This paper presents a design methodology to ease the design of a flexible RF receiver based on an analog discrete time Fast Fourier Transform (FFT). A proposed architecture named SASP (Sampled Analog Signal Processor) targets the previously exposed concept for wireless constraints. The FFT algorithm brings an analog weighting unit which is the most power hungry part in such an analog discrete time processor.

Keywords

analogue circuits; fast Fourier transforms; radio receivers; signal processing; software radio; SASP; SR; analog discrete time FFT; analog discrete time fast Fourier transform; analog discrete time processor; analog weighting unit; discrete time weighting system; flexible RF receiver; frequency 2 GHz; sampled analog signal processing; single receiver; software radio; wireless constraints; wireless systems; Accuracy; Power demand; Receivers; Robustness; Signal processing; Software radio; Strontium;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on

Conference_Location

Beirut

Print_ISBN

978-1-4577-1845-8

Electronic_ISBN

978-1-4577-1844-1

Type

conf

DOI

10.1109/ICECS.2011.6122213

Filename

6122213