DocumentCode :
2920804
Title :
Reduction of up-converted flicker noise in differential LC-VCO designed in 32nm CMOS technology
Author :
Ponton, D. ; Knoblinger, G. ; Roithmeier, A. ; Tiebout, M. ; Fulde, M. ; Palestri, P.
Author_Institution :
DIEGM, Univ. of Udine, Udine, Italy
fYear :
2009
fDate :
12-17 July 2009
Firstpage :
232
Lastpage :
235
Abstract :
This paper deals with the design of LC Voltage Controlled Oscillator (LC-VCO) for GSM applications, implemented in a state-of-the-art 32 nm Planar CMOS technology. A standard VCO is compared with a topology featuring tail decoupling, which, to best of our knowledge, is used for the first time for a wide tuning-range application (i.e. 700 MHz centered at 3.65 GHz). The Decoupled VCO significantly reduces the Phase-Noise, up to 9 dB, by lowering the impact of the flicker noise introduced by the switching-pair on the 1/f3 region, with comparable current consumption and tuning-range with respect to the standard VCO.
Keywords :
CMOS analogue integrated circuits; cellular radio; microwave integrated circuits; voltage-controlled oscillators; GSM application; LC voltage controlled oscillator; bandwidth 700 MHz; differential LC-VCO; frequency 3.65 GHz; planar CMOS technology; size 32 nm; upconverted flicker noise; 1f noise; Bridge circuits; CMOS technology; GSM; Noise level; Phase locked loops; Tail; Topology; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research in Microelectronics and Electronics, 2009. PRIME 2009. Ph.D.
Conference_Location :
Cork
Print_ISBN :
978-1-4244-3733-7
Electronic_ISBN :
978-1-4244-3734-4
Type :
conf
DOI :
10.1109/RME.2009.5201309
Filename :
5201309
Link To Document :
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