A super fast and memory efficient diagnostic simulation algorithm for combinational circuits

Author

Jou, Jer Min ; Chen, Shung-Chih ; Chen, Ren-Der

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

Volume

1

fYear

1994

fDate

30 May-2 Jun 1994

Firstpage

85

Abstract

In this paper, we present an efficient diagnostic simulation method for combinational circuits. Two concepts are incorporated in this method. We adopt the critical line concept so that only stems, instead of all the faults, need to record the primary output responses and introduce the parallel simulation concept to propagate the effects of all the stems simultaneously. With these two approaches, our diagnostic simulator is efficient in speed and memory usage compared to an existed one

Keywords

automatic testing; circuit analysis computing; combinational circuits; digital simulation; fault diagnosis; logic testing; parallel algorithms; combinational circuits; critical line concept; fault diagnosis; memory efficient diagnostic simulation algorithm; memory usage; parallel simulation concept; primary output responses; stems; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Fault detection; Fault diagnosis; Inspection; Power measurement; Sequential analysis; Size measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on

Conference_Location

London

Print_ISBN

0-7803-1915-X

Type

conf

DOI

10.1109/ISCAS.1994.408761

Filename

408761