• DocumentCode
    292897
  • Title

    PHIroute: A parallel hierarchical sea-of-gates router

  • Author

    Spruth, Henning ; Johannes, Frank ; Antreich, Kurt

  • Author_Institution
    Inst. of Electron. Design Autom., Tech. Univ. Munich, Germany
  • Volume
    1
  • fYear
    1994
  • fDate
    30 May-2 Jun 1994
  • Firstpage
    487
  • Abstract
    The routing of modern sea-of-gates circuits is a very hard to solve combinatorial problem. The use of three or more layers of metal allows for channelless designs, where area routers are used to connect the pins of a net. In this paper, we present a new router that aims at combining the good quality of the traditional global/final routing approach with the high efficiency of strictly hierarchical routers. This is achieved by reducing the routing problem until its complexity is manageable. The reduced problem is then solved hierarchically by well-known maze-running algorithms using the divide-and-conquer paradigm. In addition to the ability to handle big circuits efficiently, this approach allows the parallel solution of subproblems, yielding significant speedups even when using workstation networks
  • Keywords
    VLSI; circuit layout CAD; computational complexity; integrated circuit layout; logic CAD; logic arrays; network routing; parallel algorithms; PHIroute; complexity; maze-running algorithms; parallel hierarchical SOG router; sea-of-gates router; Algorithm design and analysis; Circuit synthesis; Electronic design automation and methodology; Integrated circuit interconnections; Modems; Network synthesis; Pins; Routing; Very large scale integration; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
  • Conference_Location
    London
  • Print_ISBN
    0-7803-1915-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1994.408844
  • Filename
    408844