Implementation of fast bit-serial lattice wave digital filters

In this paper we discuss the design and implementation of fixed-function wave digital lattice filters. We demonstrate by means of an example that a sampling frequency of more than 130 MHz can be achieved by using bit-serial arithmetic. The proposed approach leads to very fast filters with low power consumption and a minimum requirement of chip area. Further, we show that the iteration period bound by Renfors et al. (1981) often can be lowered by applying numerical equivalence transformations to the signal-flow graph. The proposed implementation technique can easily be extended to higher-order bireciprocal and non-bireciprocal lattice filters as well as other types of filters