RNS approach to full parallel linear combinators

Unconventional number systems have been proposed as an alternative to conventional weighted number systems in realizing digital signal processing (DSP) processors. A well-known advantage of these systems is related to the intrinsic property of performing operations in a finite field of numbers, thus always avoiding overflow. This advantage is fully met by applying the proposed method, which realizes a full parallel linear combinator as a single device by the residue number system (RNS) approach. The linear combinator is implemented as two parallel modular structures which can work very quickly by means the well-known isomorphism technique. This technique reduces the computational costs of multipliers to that of adders. Some particular aspects of VLSI implementation are also discussed