Improve the compression ratios for code-based test vector compressions by decomposing

Code-based test vector compressions are the most capable of testing current SOCs consisted of a large number of IP cores because they do not need the structure information of the cores. However, the compression ratios of this kind of compression approaches are often lower than that of other compression methods, such as linear-decompression-based schemes and broadcast-scan-based schemes. In this paper, we propose a novel method that can greatly improve the compression ratios for code-based test vector compression techniques with affordable overheads. The method decomposes an original test set to a prominent component set and a residue set using Hadamard transform. The prominent component set can be generated easily by an additional on-chip TPG, whereas the residue set can be compressed efficiently. When testing is conducted, the compressed residue is transmitted from the tester to the CUT and decompressed by a decompressor. At the same time, the prominent component set is produced by the on-chip TPG, and then composed with the residue to restore the original test set that is at last applied to the CUT. The experimental results for seven different code-based methods on some largest ISCAS´89 circuits show that the total average compression ratio rises from 60.76% to 77.74%. The compression ratio will be further improved to 85.39% if a fault simulation tool can be used. Primary results on some ITC´99 circuitries are also provided.