Title :
VLSI array processors implementation of block-state IIR digital filters
Author :
Tawfik, A. ; El-Guibaly, F. ; Agathoklis, P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
fDate :
30 May-2 Jun 1994
Abstract :
In this paper, an efficient (in the AT and AT2 senses) systolic implementation of state-space realization of the IIR digital filters is presented. The technique used is based on block-state description in which the state update matrix is full. The new implementation has significantly reduced number of processor elements while simultaneously maintaining a high input sampling rate
Keywords :
IIR filters; VLSI; digital filters; digital signal processing chips; matrix algebra; state-space methods; systolic arrays; VLSI array processors; block-state IIR digital filters; block-state description; high input sampling rate; state update matrix; state-space realization; systolic implementation; Digital filters; Equations; Feedback loop; Hardware; IIR filters; Karhunen-Loeve transforms; Processor scheduling; Sampling methods; Throughput; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
DOI :
10.1109/ISCAS.1994.409248
