The design of fast asynchronous adder structures and their implementation using DCVS logic

New asynchronous adder structures with high performances and low cost have been designed. Previous work has only reported the design of carry-save and carry-ripple asynchronous adders. In this study, we have developed new asynchronous adders, Carry Select Adders, Carry Skip Adders, Carry Look Ahead Adders and we compare their potentialities in terms of speed and complexity. First, the functional properties of the conventional asynchronous carry ripple addition scheme are described so as to introduce the capabilities of asynchronous adders and to show how asynchronous operators can be far more efficient than synchronous ones. Then, starting from the well known architectures previously developed to accelerate the addition operation, we first describe their asynchronous equivalents and then show how they can be optimized to fully exploit the functional and electrical dependencies of the computation process with respect to the data