• DocumentCode
    293179
  • Title

    A pulse coded winner-take-all circuit

  • Author

    Meador, Jack ; Hylander, Paul

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA
  • Volume
    4
  • fYear
    1994
  • fDate
    30 May-2 Jun 1994
  • Firstpage
    299
  • Abstract
    This paper presents a pulse-coded winner-take-all (PWTA) network which employs a unique combination of presynaptic and lateral inhibition that can be efficiently implemented in VLSI. The manner in which the network not only selects the winner but also indicates the weight of the decision made is unique among established winner-take-all networks. A combination of all-or-nothing and graded responses is encoded as a variable rate pulse train appearing only at the output of the winning unit. The mechanism used is closely related to the presynaptic inhibition approach introduced [Yuille 1988] with the exception that it is self-resetting and has properties which make it well suited for electronic realizations using asynchronous pulse-coded circuitry
  • Keywords
    ART neural nets; Hopfield neural nets; VLSI; neural chips; self-organising feature maps; VLSI; all-or-nothing response; asynchronous pulse-coded circuitry; electronic realizations; graded response; lateral inhibition; presynaptic inhibition; pulse coded winner-take-all circuit; self-resetting mechanism; variable rate pulse train; Computer networks; Distributed computing; Lifting equipment; Mechanical factors; Neural networks; Prototypes; Pulse circuits; Recurrent neural networks; Registers; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
  • Conference_Location
    London
  • Print_ISBN
    0-7803-1915-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1994.409256
  • Filename
    409256