• DocumentCode
    29318
  • Title

    A WCDMA/WLAN Digital Polar Transmitter With Low-Noise ADPLL, Wideband PM/AM Modulator, and Linearized PA

  • Author

    Shiyuan Zheng ; Luong, Howard C.

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
  • Volume
    50
  • Issue
    7
  • fYear
    2015
  • fDate
    Jul-15
  • Firstpage
    1645
  • Lastpage
    1656
  • Abstract
    This paper presents a single-chip digital-intensive polar transmitter for WCDMA and WLAN integrating a low-phase-noise all-digital phase-locked loop (ADPLL), a digitally-controlled wideband phase/amplitude modulator, and a calibration-free high-linearity power amplifier. From the ADPLL, the 1.7-2.5 GHz LO signal is generated together with a ÷1.5 frequency divider to eliminate DCO pulling. The phase noise of the ADPLL is optimized by using a linearized stochastic TDC with 3 ps resolution and a Class-C quadrature DCO (QDCO) with embedded quadrature phase shifter and quantization-noise filter. A 2-segment ΣΔ switching phase modulator enhances the PM bandwidth up to 200 MHz, and a digital polar amplifier employs AM-replica linearization to eliminate AM pre-distortion. The TX achieves a -1 dB output compression point of 22.8 dBm with an overall system efficiency of 27.6% and measures EVM of 4% for a 20 MHz 64-QAM signal at an output power of 13.8 dBm.
  • Keywords
    code division multiple access; filters; frequency dividers; oscillators; phase locked loops; phase modulation; phase noise; power amplifiers; quadrature amplitude modulation; radio transmitters; radiofrequency integrated circuits; sigma-delta modulation; stochastic processes; wireless LAN; ΣΔ switching phase modulator; AM predistortion; AM-replica linearization; DCO pulling; EVM; LO signal; PM bandwidth; QAM signal; QDCO; WCDMA-WLAN digital polar transmitter; calibration-free high-linearity power amplifier; class-C quadrature DCO; digital polar amplifier; digitally-controlled wideband phase-amplitude modulator; embedded quadrature phase shifter; frequency 1.7 GHz to 2.5 GHz; frequency 20 MHz; frequency divider; linearized PA; linearized stochastic TDC; low-noise ADPLL; low-phase-noise all-digital phase-locked loop; quadrature amplitude modulation; quantization-noise filter; sigma-delta switching phase modulator; single-chip digital-intensive polar transmitter; wavelength code division multiple access; wideband PM-AM modulator; Frequency modulation; Phase modulation; Phase noise; Switches; Transmitters; Wideband; ADPLL; DCO; digital transmitter; linearization; phase interpolation; polar transmitter; power amplifier; quadrature oscillator; stochastic TDC; synthesizer; transformer;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2015.2413846
  • Filename
    7086347