Floating Gate super multi level NAND Flash Memory Technology for 30nm and beyond

Author

Kamigaichi, T. ; Arai, F. ; Nitsuta, H. ; Endo, M. ; Nishihara, K. ; Murata, T. ; Takekida, H. ; Izumi, T. ; Uchida, K. ; Maruyama, T. ; Kawabata, I. ; Suyama, Y. ; Sato, A. ; Ueno, K. ; Takeshita, H. ; Joko, Y. ; Watanabe, S. ; Liu, Y. ; Meguro, H. ; Kaj

Author_Institution

Toshiba Corp., Yokohama

fYear

2008

fDate

15-17 Dec. 2008

Firstpage

1

Lastpage

4

Abstract

A floating gate NAND flash memory technology for 30 nm and beyond has been successfully developed. Wide program/erase window, tight natural threshold voltage (Vth) distribution, and good cell reliabilities such as program disturb, program/erase endurance and data retention are successfully demonstrated, which are essential to realize super MLC.

Keywords

NAND circuits; flash memories; integrated circuit reliability; integrated memory circuits; multivalued logic; nanoelectronics; MLC; data retention; floating gate NAND flash memory technology; memory cell reliability; multilevel cell; threshold voltage distribution; Dielectric constant; Dielectric films; Dielectric materials; Inorganic materials; Nonvolatile memory; Sheet materials; Silicides; Silicon; Space technology; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2008. IEDM 2008. IEEE International

Conference_Location

San Francisco, CA

ISSN

8164-2284

Print_ISBN

978-1-4244-2377-4

Electronic_ISBN

8164-2284

Type

conf

DOI

10.1109/IEDM.2008.4796825

Filename

4796825