DocumentCode
293269
Title
Interlaced sampling for noise reduction
Author
Uhlemann, V. ; Hosticka, B.J. ; Brockherde, W.
Author_Institution
Fraunhofer Inst. of Microelectron. Circuits & Syst., Duisburg, Germany
Volume
5
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
425
Abstract
New algorithms called interlaced-correlated-double and triple-sampling are presented that perform noise reduction in analog discrete-time circuits. Both are based on multiple correlated-double-sampling principle. Theoretical improvement of noise reduction has been verified using computer simulations. The contribution also discusses CMOS realization of the proposed method
Keywords
CMOS analogue integrated circuits; discrete time systems; integrated circuit noise; signal sampling; CMOS; algorithms; analog discrete-time circuits; computer simulation; interlaced sampling; interlaced-correlated-double-sampling; interlaced-correlated-triple-sampling; multiple correlated-double-sampling; noise reduction; Detectors; Frequency; Low-frequency noise; Noise figure; Noise reduction; Sampling methods; Signal processing algorithms; Signal sampling; Transfer functions; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409400
Filename
409400
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