Advanced nuclear instrumentation design using Programmable Logic Devices

The evolution of semiconductor technology has made the application of Programmable Logic Devices (PLD) inevitable in modern digital systems design but when they are deployed in Safety Critical Systems (SCS), their reliability and safety need to be proved beyond doubt. PLDs are available as off-the-shelf parts that offer a wide range of logic capacity, various features, speed and voltage characteristics. These devices can be customized as per the user requirements. Re-programmable series of PLDs allows designers to change the circuitry as often as they want until the design operates to their satisfaction. To describe the digital designs, IEEE standard Hardware Description Languages (HDL) such as VHDL and Verilog HDL are used. As designs grow more complex, the verification problems increase exponentially. High level Verification Languages (HVL) have emerged to solve the functional verification bottleneck. Using HVLs, directed-random verification approach is adopted to achieve high coverage. The purpose of this approach is to ensure that the system is verified for its functionality in all possible scenarios. A 500 MWe Prototype Fast Breeder Reactor (PFBR) is in the advanced stage of construction at Kalpakkam (Tamilnadu), INDIA. PLDs are extensively utilized in designing instrumentation systems like core monitoring and safety logic functions of PFBR. This paper provides review of advanced digital design methodologies adopted in designing PLD based SCS.