Efficient noise analysis methods for large non-ideal SC and SI circuits

A fully general and efficient noise analysis method is presented for both switched capacitor and switched-current circuits. The fold back effects and non-ideal effects such as parasitic resistive time constant have been taken into account. The thermal noise and flicker noise generated by MOS transistors are considered. By utilising the adjoint network technique, only one system solution is needed for noise analysis. In addition, numerical inversion of the Laplace transformation, the Hessenberg technique, extensive sparse matrix routines and interpretable code generation have been used to improve the efficiency of noise analysis. The method has been implemented in SCNAP4 and numerical results are given in the last section