A 136 cycles/MB, luma-chroma parallelized H.264/AVC deblocking filter for QFHD applications

In this paper, we present a high-throughput deblocking filter architecture for H.264/AVC in QFHD applications. In order to enhance the parallelism of filtering without notably increasing the area, we propose to parallelize the processing of luminance and chrominance samples, instead of simultaneously filtering two edges of a same component. Although the edge filter and transpose cost of the proposed architecture is a little larger than that of the single-filter solution, control logic is saved by applying an identical processing schedule to both the luminance and chrominance samples. Meanwhile, total SRAM size by bit is kept unchanged when the architecture is parallelized. As a result, throughput of this work is advanced by 50% (or processing time reduced by 33%), to be 136 cycles/MB, while area cost (17.9 k gates logic and 8 k bits SRAM) is kept comparable to the state-of-the-art works.