DocumentCode
2934825
Title
Impact of solder pad size on solder joint reliability in flip chip PBGA packages
Author
Mercado, Lei ; Sarihan, Vijay ; Guo, Yifan ; Mawer, Andrew
Author_Institution
Adv. Interconnect Syst. Lab., Motorola Inc., Tempe, AZ, USA
fYear
1999
fDate
1999
Firstpage
255
Lastpage
259
Abstract
A variety of package parameters impact package reliability. One of the parameters that does not get much attention is the variations in package design that are assembly and vendor related. It was shown in this study that the solder pad size plays a big role in solder joint reliability. The difference in solder pad size due to different vendors and processes can affect the reliability considerably. In certain cases, the pad size effect can be so significant that it will override the effect of substrate thickness. Our work indicates that in order to obtain good correlations between predictive engineering results and reliability tests data, this factor should not be ignored. In this paper, finite element analysis was used to study the impact of substrate thickness on solder reliability for flip-chip PBGA (plastic ball grid array) packages. The simulation results were experimentally validated with moire interferometry. Both numerical and experimental results indicated that better solder reliability could be achieved by using thicker substrate. However, the size of BGA solder pad was found to be crucial to BGA life. In order to achieve higher C5 (controlled collapse chip carrier connection) reliability, a larger solder pad is preferred
Keywords
ball grid arrays; finite element analysis; flip-chip devices; integrated circuit packaging; integrated circuit reliability; plastic packaging; soldering; substrates; BGA life; C5 reliability; FEM; controlled collapse chip carrier connection; finite element analysis; flip chip PBGA packages; moire interferometry; package design variations; package reliability; plastic BGA packages; plastic ball grid array packages; solder joint reliability; solder pad size; substrate thickness; Assembly; Data engineering; Electronics packaging; Finite element methods; Flip chip; Interferometry; Plastic packaging; Reliability engineering; Soldering; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 1999. 1999 Proceedings. 49th
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
0-7803-5231-9
Type
conf
DOI
10.1109/ECTC.1999.776181
Filename
776181
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