Title :
Bit Level Systolic Lattice Filter Synthesizer
Author :
Madan, B.B. ; Parker, S.R. ; Zubiar, M.
Author_Institution :
Naval Postgraduate School
Keywords :
Array signal processing; Computer architecture; Delay; Filters; Flow graphs; Lattices; Pipeline processing; Synthesizers; Systolic arrays; Very large scale integration;
Conference_Titel :
Circuits, Systems and Computers, 1985. Nineteeth Asilomar Conference on
Conference_Location :
Pacific Grove, CA,USA
Print_ISBN :
0-8186-0729-7
DOI :
10.1109/ACSSC.1985.671552