DocumentCode :
2943816
Title :
1 GHz CMOS down-conversion mixer
Author :
Lee, Seungwook ; Yoo, Changsik ; Kim, Wonchan ; Hyun-Kyu Ryn ; Song, Wonchul
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
fYear :
1997
fDate :
2-4 Dec 1997
Firstpage :
125
Lastpage :
127
Abstract :
A 1 GHz CMOS down-conversion mixer is described. The mixer is of differential architecture where the common-mode feedback circuit is eliminated by employing robust loads. Cascode stages are used to reduce the LO-to-RF feedthrough which is measured to be -79 dB. A prototype mixer was implemented in a standard 0.8 μm CMOS process and consumes 7.3 mW at 3.3 V supply. The power conversion gain is -0.8 dB. The noise figure and the input IP3 are 19 dB and 0.6 dBm, respectively
Keywords :
CMOS integrated circuits; UHF mixers; frequency convertors; 1 GHz; 19 dB; 3.3 V; 7.3 mW; CMOS down-conversion mixer; LO-to-RF feedthrough reduction; cascode stages; differential architecture; input IP3; noise figure; power conversion gain; CMOS process; CMOS technology; Feedback circuits; Linearity; MOSFETs; Mixers; Noise figure; RF signals; Radio frequency; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 1997. ISCE '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-4371-9
Type :
conf
DOI :
10.1109/ISCE.1997.658368
Filename :
658368
Link To Document :
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