DocumentCode
2944795
Title
Gate CD control using APC for high mix product line
Author
Hayashi, Masakazu ; Kosugi, Makoto
Author_Institution
Fujitsu Ltd. Akiruno, Tokyo
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
1
Lastpage
4
Abstract
We succeeded in developing the advanced process control (APC) algorithm in gate etching for high mix product line. The gate length is controlled by adjusting the critical dimension (CD) bias based on the optimal etching condition calculated by APC. The CD bias depends on the device pattern as well as the etching condition. Therefore, it is necessary to compensate for the CD bias according to the device pattern in the mix product line. Our APC algorithm enables to adjust the CD bias offset for high mix products automatically. The APC was applied to the sub-micron gate etching of 300-mm wafers. As a result, the gate lengths among the mix products approached to the targets using APC. This demonstrates that our APC algorithm is effective for the high mix product line.
Keywords
etching; process control; semiconductor device manufacture; advanced process control algorithm; critical dimension bias; gate CD control; gate etching; gate length; high mix product line; optimal etching condition; Etching; Fabrication; Fluctuations; Inspection; Optimal control; Process control; Production; Resists; System-on-a-chip; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1523-553X
Print_ISBN
978-1-4244-1142-9
Electronic_ISBN
1523-553X
Type
conf
DOI
10.1109/ISSM.2007.4446842
Filename
4446842
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