Efficient ASIC Implementation and Analysis of Two EPC-C1G2 RFID Authentication Protocols

The Internet of Things refers to the use of services provided by the networked objects (things) equipped with computational capabilities. A wide range of devices can be attached to objects to provide them with computing and networking functions, from RFID tags for identification purposes to a variety of wireless sensors. In the case of RFID technologies operating in the UHF band, the EPC Class-1 Generation-2 (EPC-C1G2) is one of the most established working frameworks. The security of this standard is quite low and many researchers have proposed over the last years alternative schemes aimed at correcting its multiple vulnerabilities. Unfortunately, the hardware implementation of such protocols has been long neglected, and it is unclear whether these proposals could fit a low-cost device where very few resources can be devoted to the security functions. In this paper, we address this question by reporting our experiences with the ASIC implementation of two representative EPC-C1G2 authentication protocols. We explore the design space and provide a detailed analysis of the area occupied by the synthesized circuits, their power consumption, and the throughput in terms of protocol runs per second. To the best of our knowledge, this is the first ASIC implementation of two lightweight protocols conforming the EPC-C1G2 specification. We believe that some of the discussion and insights here reported could be helpful to future implementations, both for RFID systems and resource-constrained sensors.