DocumentCode :
2946641
Title :
A single SiGe chip fractional-N 275 MHz - 20 GHz PLL with integrated 20 GHz VCO
Author :
Follmann, R. ; Köther, D. ; Kohl, T. ; Engels, M. ; Podrebersek, T. ; Heyer, V. ; Schmalz, K. ; Herzel, F. ; Winkler, W. ; Osmany, S. ; Jagdhold, U.
Author_Institution :
IMST GmbH, D - 47475 Kamp-Lintfort, Germany
fYear :
2008
fDate :
15-20 June 2008
Firstpage :
355
Lastpage :
358
Abstract :
Broad band satellite communication makes high demands on linear low phase noise signals. One example is HDTV. For this application converters are required (e.g. from 30 GHz to 20 GHz), which themselves require very low phase noise programmable synthesizers (LO). Most satellite companies today derive their 10 GHz LOs from multiplying a 100 MHz crystal oscillator again and again. Due to the arising sub-harmonics excessive filtering is required. Thus, today´s satellite LOs are large and quite heavy in weight. In this paper we demonstrate a single chip SiGe integrated fractional-N PLL, which can either be used with the internal integrated VCO between 18.5 and 20.0 GHz or with any external VCO between 275 MHz...20 GHz. The LO presented fulfills the high demands on phase noise for satellite applications. Furthermore, first radiation hardness steps such as triple model redundancy have already been implemented.
Keywords :
Frequency conversion; Germanium silicon alloys; Local oscillators; MMICs; Phase locked loops; Phase noise; Satellites; Silicon germanium; Synthesizers; Voltage-controlled oscillators; CMOS; PLL; SiGe; VCO; downconverter; mixed signal; satellite applications; synthesizer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest, 2008 IEEE MTT-S International
Conference_Location :
Atlanta, GA, USA
ISSN :
0149-645X
Print_ISBN :
978-1-4244-1780-3
Electronic_ISBN :
0149-645X
Type :
conf
DOI :
10.1109/MWSYM.2008.4633176
Filename :
4633176
Link To Document :
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