DocumentCode
2947764
Title
On fast exploration of ASIC design space
Author
Shen, Z.X. ; Jong, C.C.
Author_Institution
Nat. Supercomput. Res. Centre, Nat. Univ. of Singapore, Singapore
fYear
1996
fDate
21-24 Oct 1996
Firstpage
96
Lastpage
99
Abstract
Ever-increasing microelectronics technology and market drive the ASICs more and more complex. Design space exploration become a crucial problem in high level synthesis. In this paper, an efficient precedence bipartite model and algorithms is proposed to explore the large design space. Experimental results show that with this model both the efficiency and the performance of synthesizing large digital system are greatly improved
Keywords
application specific integrated circuits; high level synthesis; integrated circuit design; ASIC design space; algorithm; bipartite model; digital system; high level synthesis; microelectronics technology; Application specific integrated circuits; Constraint optimization; Consumer electronics; Control system synthesis; Design optimization; Digital systems; Flow graphs; Scheduling; Space exploration; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 1996., 2nd International Conference on
Conference_Location
Shanghai
Print_ISBN
7-5439-0940-5
Type
conf
DOI
10.1109/ICASIC.1996.562760
Filename
562760
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