A simplified module interface style for synthesis education

Author

Smith, David R.

Author_Institution

Dept. of Comput. Sci., State Univ. of New York, Stony Brook, NY, USA

fYear

1997

fDate

21-23 Jul 1997

Firstpage

73

Lastpage

74

Abstract

In the synthesis course at Stony Brook we have made it possible for students to complete the tasks of specification, simulation, synthesis, FPGA fitting, low level verification, both on homework sets and on a non-trivial project, all within one semester. We do it by using a set of standard components and a consistent and standardized interface throughout: for the library components, for the designs themselves, and for the testbenches. It is possible to get designs working quickly because the control is implicit and the synthesis scripts are standardised, even though the projects covered a range from radix 4 multiplication and division, memory interleaver, a synchrotron controller, and parts for a 3 dimensional graphics engine. The paper summarizes the method and illustrates it on a design for a RAM built-in self-test

Keywords

application specific integrated circuits; built-in self test; circuit CAD; computer aided instruction; computer science education; educational courses; electronic engineering education; field programmable gate arrays; integrated circuit design; integrated memory circuits; logic CAD; random-access storage; RAM BIST; Stony Brook; built-in self-test; digital design; module interface style; students; synthesis course; synthesis education; Built-in self-test; Clocks; Computer science; Computer science education; Field programmable gate arrays; Hardware design languages; Libraries; Random access memory; Synchrotrons; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Systems Education, 1997. MSE '97. Proceedings., 1997 IEEE International Conference on

Conference_Location

Arlington, VA

Print_ISBN

0-8186-7996-4

Type

conf

DOI

10.1109/MSE.1997.612553

Filename

612553