Nonuniform sampling digital PLL with fast error correction technique

A non-uniform sampling Time Delay Digital Tanlock loop with an enhanced frequency acquisition performance is proposed in this work. An error detection circuitry is utilized to adjust the loop gain before the system goes out of the locking range. The process is controlled by a finite state machine. Through this adaptive process, the system can efficiently overcome frequency disturbances that may cause the loop to go out of lock. The performance of the proposed system under noise free conditions has been investigated by analysis and computer simulation. It is shown that the new developed loop can offer rapid acquisition and good tracking performance over a wide locking range.