Associative memory design for the FastTrack processor (FTK) at ATLAS

Author

Annovi, A. ; Beretta, M. ; Bossini, E. ; Crescioli, F. ; Orso, M. Dell ; Giannetti, P. ; Piendibene, M. ; Sacco, I. ; Sartori, L. ; Tripiccione, R.

Author_Institution

Lab. Naz. di Frascati, Ist. Naz. di Fis. Nucleare, Frascati, Italy

fYear

2010

fDate

24-28 May 2010

Firstpage

1

Lastpage

3

Abstract

We propose a new generation of VLSI processor for pattern recognition based on Associative Memory architecture, optimized for on-line track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new R&D Associative Memory project: it maximizes the pattern density on ASICs, minimizes the power consumption and improves the functionality for the Fast Tracker (FTK) proposed to upgrade the ATLAS trigger at LHC. Finally we will focus on possible future applications inside and outside High Physics Energy (HEP).

Keywords

application specific integrated circuits; high energy physics instrumentation computing; nuclear electronics; transition radiation detectors; ASIC; ATLAS trigger; Large Hadron Collider; VLSI processor; associative memory design; associative memory project; fast track processor; high-energy physics experiments; on-line track finding; pattern recognition; prototype design; Application specific integrated circuits; Associative memory; Detectors; Physics; Power demand; Prototypes; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Real Time Conference (RT), 2010 17th IEEE-NPSS

Conference_Location

Lisbon

Print_ISBN

978-1-4244-7108-9

Type

conf

DOI

10.1109/RTC.2010.5750451

Filename

5750451