• DocumentCode
    2956933
  • Title

    Design and synthesis of a generic board-level test controller

  • Author

    Hakegard, Jan ; Peng, Zebo

  • Author_Institution
    Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
  • fYear
    1997
  • fDate
    1-4 Sep 1997
  • Firstpage
    222
  • Lastpage
    227
  • Abstract
    The paper describes an approach to hierarchical self tests by use of a test controller. As design for testability and built-in self tests (BIST) at the board level are becoming increasingly important, research has been carried out on formulating test controllers to control test activities. In our approach, instead of providing a fixed test controller design, an automatic synthesis tool is developed to generate test controllers based on the specific properties of a board and its test requirements. In this way the test controller is more efficient and a better performance/cost ratio can be achieved
  • Keywords
    boundary scan testing; built-in self test; design for testability; high level synthesis; automatic synthesis tool; built-in self tests; design for testability; generic board level test controller; hierarchical self tests; performance/cost ratio; test controllers; test requirements; Automatic control; Automatic generation control; Automatic testing; Built-in self-test; Circuit testing; Control systems; Design for testability; Printed circuits; Surface-mount technology; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    EUROMICRO 97. 'New Frontiers of Information Technology'. Short Contributions., Proceedings of the 23rd Euromicro Conference
  • Conference_Location
    Budapest
  • Print_ISBN
    0-8186-8215-9
  • Type

    conf

  • DOI
    10.1109/EMSCNT.1997.658470
  • Filename
    658470