Title :
Practical solutions for scan design
Author :
Liang, Zhang ; Xiangqing, He
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Abstract :
This paper discusses structure of system clocks in circuits, and points out effective methods for scan design. Using these methods we can easily achieve testable design for synchronistic circuits
Keywords :
VLSI; boundary scan testing; clocks; design for testability; logic CAD; VLSI; design for testability; scan design; synchronistic circuits; system clocks; testable design; Circuit faults; Circuit testing; Clocks; Electronic equipment testing; Flip-flops; Logic testing; Signal design; Silicon compounds; System testing; Very large scale integration;
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
DOI :
10.1109/ICASIC.1996.562833
