DocumentCode :
2957112
Title :
Test structures to characterise a novel circuit fabrication technique that uses offset lithography
Author :
Walton, A.J. ; Stevenson, J.T.M. ; Fallon, M. ; Evans, P.S.A. ; Ramsey, B.J. ; Harrison, D.
Author_Institution :
Dept. of Electr. Eng., Edinburgh Univ., UK
fYear :
1998
fDate :
23-26 Mar 1998
Firstpage :
39
Lastpage :
44
Abstract :
This paper reports on the use of microelectronic test structures to characterise a novel fabrication technique for thin-film electronic circuit boards. In this technology, circuit tracks are formed on paper-like substrates by depositing films of a metal-loaded ink via a standard lithographic printing process. Sheet resistance and line width are electrically evaluated and these quantities are compared with optical and surface profiling measurements
Keywords :
electric resistance measurement; integrated circuit testing; integrated circuit yield; lithography; size measurement; thin film circuits; circuit fabrication technique; circuit tracks; electrical linewidth evaluation; line width; metal-loaded ink films; microelectronic test structures; offset lithography; optical measurements; paper-like substrates; sheet resistance; standard lithographic printing process; surface profiling measurements; test structures; thin-film electronic circuit boards; Circuit testing; Electronic circuits; Electronic equipment testing; Microelectronics; Optical device fabrication; Optical films; Paper technology; Substrates; Surface resistance; Thin film circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1998. ICMTS 1998., Proceedings of the 1998 International Conference on
Conference_Location :
Kanazawa
Print_ISBN :
0-7803-4348-4
Type :
conf
DOI :
10.1109/ICMTS.1998.688032
Filename :
688032
Link To Document :
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