A Design Approach for Low Phase Noise 5GHz Complementary Quadrature Oscillator

A novel complementary quadrature LC oscillator is presented for achieving lower phase noise. One proposed and three conventional structures, designed in a 0.18 mum CMOS technology, are simulated in both the triple-well and the twin-well (exactly the quasi twin-well) process technologies and each phase noise is compared. These circuits operate at 5 GHz and draw 8.6 mA from a 1.8 V supply. In the triple-well environment 1-4 dBc/Hz over the entire offset frequency is improved, for the twin-well 2-5 dBc/Hz. The best-case, the proposed circuit in the triple-well, the phase noise is -130.0 dBc/Hz at 1 MHz offset frequency.