Title :
A high-speed constant-factor redundant CORDIC processor without extra correcting or scaling iterations
Author_Institution :
Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Abstract :
A new high-speed redundant CORDIC processor with constant scaling factor is designed. Compared to previously proposed redundant CORDIC methods, the new processor not only preserves the constancy of the scaling factor, but also performs the scaling operation within the regular iterations. Thus, the processor does not require any complicated division/square-rooting operations, extra correcting iterations, or additional scaling iterations. VLSI implementation result of the new redundant CORDIC processor is also included
Keywords :
VLSI; digital arithmetic; high-speed integrated circuits; iterative methods; redundancy; VLSI implementation; constant-factor redundant CORDIC processor; regular iterations; scaling factor; signed-digit representation; Adders; Application software; Design engineering; Digital arithmetic; Digital signal processing chips; Hardware; Indexing; Process design; Signal processing algorithms; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.777913
