Title :
A 126.6 mm/sup 2/ AND-type 512 Mb flash memory with 1.8 V power supply
Author :
Ishii, T. ; Oshima, K. ; Sato, H. ; Noda, S. ; Kishimoto, J. ; Kotani, H. ; Nozoe, A. ; Furusawa, K. ; Yoshitake, T. ; Kato, M. ; Takaheshi, M. ; Sato, A. ; Kubano, S. ; Manita, K. ; Koda, K. ; Nakayama, T. ; Hosogane, A.
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
A 512 Mb AND-type flash memory in 0.18 /spl mu/m CMOS achieves 126.6 mm/sup 2/ die size, uses a multilevel technique, and adapts to 1.8 V operation. In addition, a read-modify-write mode enables programming free from pre-programmed states.
Keywords :
CMOS memory circuits; flash memories; multivalued logic; 0.18 micron; 1.8 V; 512 Mbit; AND-type flash memory; CMOS; die size; memory programming; multilevel technique; read-modify-write mode; Capacitors; Charge pumps; Degradation; Flash memory; Low voltage; Mobile handsets; Parasitic capacitance; Personal communication networks; Power supplies; Semiconductor device modeling;
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6608-5
DOI :
10.1109/ISSCC.2001.912419
