DocumentCode
2978628
Title
A nonvolatile ferroelectric RAM with common plate folded bit-line cell and enhanced data sensing scheme
Author
Byung-Gil Jeon ; Mun-Kyu Choi ; Yoonjong Song ; Kinam Kim
Author_Institution
Samsung Electron., Kineung, South Korea
fYear
2001
fDate
7-7 Feb. 2001
Firstpage
38
Lastpage
39
Abstract
A 4 Mb 1T1C FeRAM with a common-plate folded bit-line architecture achieves low noise without cell area penalty in nonvolatile ferroelectric RAM. The decoder of common plate scheme reduces area to about 62% that of a conventional separate-plate scheme. The chip area is reduced by 9.2% to 111 mm/sup 2/. The bit-line capacitance imbalance is resolved without speed loss or area penalty.
Keywords
ferroelectric storage; random-access storage; 4 Mbit; bit-line capacitance imbalance; common plate folded bit-line cell; data sensing; decoder; nonvolatile ferroelectric RAM; Capacitance; Capacitors; Decoding; Delay lines; Ferroelectric films; Ferroelectric materials; Noise level; Nonvolatile memory; Random access memory; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-6608-5
Type
conf
DOI
10.1109/ISSCC.2001.912423
Filename
912423
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