DocumentCode
2979403
Title
A task scheduling algorithm to package messages on distributed memory parallel machines
Author
Fujimoto, Noriyuki ; Baba, Tomoki ; Hashimoto, Takashi ; Hagihara, Kenichi
Author_Institution
Osaka Univ., Toyonaka, Japan
fYear
1999
fDate
1999
Firstpage
236
Lastpage
241
Abstract
In this paper, we report a performance gap between a schedule with good makespan on the task scheduling model and the corresponding parallel program on distributed memory parallel machines. The main reason is the software overhead in the interprocessor communication. Therefore, speedup ratios of schedules on the model do not well approximate to those of parallel programs on the machines. The purpose of the paper is to get a task scheduling algorithm that generates schedules with good approximation to the corresponding parallel program. For this purpose, we propose an algorithm BCSH that generates only bulk synchronous style schedules. In those schedules, computation phases and communication phases appear alternately. All interprocessor communications are done only in the latter phases, and thus the corresponding parallel programs can make better use of the message packaging technique easily. It reduces some software overheads of messages from a source processor to the same destination processor to almost one software overhead, and improves the performance of a parallel program significantly. Finally we show some results of performance comparisons between BCSH and Kruatrachue´s algorithm DSH. The schedules by the latter are famous for their good makespans. However the approximations of ours are much better than those of Kruatrachue´s
Keywords
distributed memory systems; performance evaluation; processor scheduling; bulk synchronous style schedules; communication phases; computation phases; distributed memory parallel machines; interprocessor communication; messages packaging; parallel program; performance gap; software overhead; software overheads; task scheduling algorithm; Aging; Approximation algorithms; Concurrent computing; Delay; Packaging machines; Parallel machines; Processor scheduling; Read only memory; Scheduling algorithm; Software packages;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures, Algorithms, and Networks, 1999. (I-SPAN '99) Proceedings. Fourth InternationalSymposium on
Conference_Location
Perth/Fremantle, WA
ISSN
1087-4089
Print_ISBN
0-7695-0231-8
Type
conf
DOI
10.1109/ISPAN.1999.778945
Filename
778945
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