DocumentCode :
2982072
Title :
SRAM current-sense amplifier with fully-compensated bit line multiplexer
Author :
Wicht, B. ; Schmitt-Landseidel, D. ; Paul, S. ; Sanders, A.
Author_Institution :
Tech. Univ. of Munich, Germany
fYear :
2001
fDate :
7-7 Feb. 2001
Firstpage :
172
Lastpage :
173
Abstract :
A current-sense amplifier that fully compensates the bit line multiplexer based on an improved feedback structure is implemented in a 512/spl times/24b 1.8 V SRAM macro in 0.18 /spl mu/m CMOS. 0.5 ns reduction of read access time is measured with 0.4% additional area.
Keywords :
CMOS memory circuits; SRAM chips; circuit feedback; low-power electronics; multiplexing equipment; 0.18 micron; 1.8 V; CMOS; SRAM; chip area; current-sense amplifier; feedback structure; fully-compensated bit line multiplexer; read access time; Circuits; Degradation; Delay; Feedback loop; Impedance; MOSFETs; Multiplexing; Random access memory; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-6608-5
Type :
conf
DOI :
10.1109/ISSCC.2001.912591
Filename :
912591
Link To Document :
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