Title :
A 1GHz low power CMOS LNA
Author :
Zhang-Jie ; Hong-Qi
Author_Institution :
Inst. of Signal Process., Hefei
Abstract :
A 1.8 V 0.18 um CMOS LNA for GPS applications has been designed and under the supply voltage, the fully differential LNA has been simulated. It provides a series of good results in Noise figure, Linearity and Power dissipation. The LNA achieves a voltage gain of 24 dB, Noise figure of 1.7 dB and Power dissipation of 9 mW. Besides, the input third-order intercept (IIP3) is 1.235 dBm and the input reflection coefficient (S11) is -38 dB.
Keywords :
CMOS integrated circuits; Global Positioning System; differential amplifiers; low noise amplifiers; GPS applications; differential LNA; input reflection coefficient; input third-order intercept; linearity; low power CMOS LNA; noise figure; power dissipation; supply voltage; CMOS technology; FETs; Impedance matching; Inductors; Low-noise amplifiers; Noise figure; Parasitic capacitance; Power dissipation; Radio frequency; Voltage;
Conference_Titel :
Microwave and Millimeter Wave Technology, 2007. ICMMT '07. International Conference on
Conference_Location :
Builin
Print_ISBN :
1-4244-1049-5
Electronic_ISBN :
1-4244-1049-5
DOI :
10.1109/ICMMT.2007.381466
