Design of a 2-GSample/s Track-and-Hold Amplifier implemented in a 60-GHz SiGe BiCMOS Process

Author

Fung, Quincy ; Fomani, Armin A. ; Feng, Yu ; Ng, Wai Tung

Author_Institution

Univ. of Toronto, Toronto

fYear

2007

fDate

20-22 Dec. 2007

Firstpage

937

Lastpage

940

Abstract

This paper presents an open-loop fully differential track-and-hold amplifier (THA) that employs switched emitter follower (SEF) architecture. With a highly linear buffer preceding the SEF structure, auxiliary SEF structure is not required. This reduction in THA structure complexity leads to a THA with a lower power consumption and smaller chip area. HSPICE simulations show that this THA circuit is capable of providing 10-bits of accuracy at the sampling speed of 2-GSample/s. Operating from a 3.5 V supply, the power consumption is 148 mW.

Keywords

Ge-Si alloys; SPICE; circuit simulation; low-power electronics; operational amplifiers; sample and hold circuits; HSPICE simulations; SiGe BiCMOS process; THA circuit; THA structure complexity; auxiliary SEF structure; lower power consumption; switched emitter follower architecture; track-and-hold amplifier; BiCMOS integrated circuits; Differential amplifiers; Energy consumption; Frequency; Germanium silicon alloys; Sampling methods; Signal sampling; Silicon germanium; Switches; Uncertainty;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on

Conference_Location

Tainan

Print_ISBN

978-1-4244-0637-1

Electronic_ISBN

978-1-4244-0637-1

Type

conf

DOI

10.1109/EDSSC.2007.4450280

Filename

4450280