DocumentCode :
2984884
Title :
Impact of BEOL, multi-fingered layout design, and gate protection diode on intrinsic MOSFET threshold voltage mismatch
Author :
Lim, G.H. ; Zhou, Xiaoxin ; Khu, K. ; Yoo, Y.K. ; Poh, F. ; See, G.H. ; Zhu, Z.M. ; Wei, C.Q. ; Lin, S.H. ; Zhu, G.J.
Author_Institution :
Nanyang Technol. Univ., Singapore
fYear :
2007
fDate :
20-22 Dec. 2007
Firstpage :
1059
Lastpage :
1062
Abstract :
Continued scaling down of MOSFETs, compounded with limitation in process variation control capabilities, has made MOSFET mismatch more significant for advanced technologies. In order to prevent over compensating for MOSFET mismatch in design margin, it is important to characterize the intrinsic MOSFET mismatch accurately. In this paper, test structures are designed to study the influence of back end of line (BEOL), multi-fingered layout, and gate protection diode (GPD) on MOSFET threshold voltage mismatch characterization.
Keywords :
MOSFET; semiconductor diodes; BEOL; back end of line; gate protection diode; intrinsic MOSFET threshold voltage mismatch; multi-fingered layout design; process variation control; Diodes; MOSFET circuits; Monitoring; Probes; Process control; Protection; Routing; Testing; Threshold voltage; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
Type :
conf
DOI :
10.1109/EDSSC.2007.4450310
Filename :
4450310
Link To Document :
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