• DocumentCode
    2985285
  • Title

    Mis-matching characteristics study of P+-poly-silicon resistor in newly CMOS process technology

  • Author

    Ho, Y.S. ; Hsu, Y.L. ; Lan, C.C. ; Tsai, Y.J. ; Chen, C.W. ; Horng, S.R. ; Fang, Y.K. ; Hu, T.C. ; Liu, C.P. ; Huang, J.J. ; Yeh, W.K.

  • Author_Institution
    Nat. Kaohsiung Univ. of Appl. Sci., Kaohsiung
  • fYear
    2007
  • fDate
    20-22 Dec. 2007
  • Firstpage
    1133
  • Lastpage
    1137
  • Abstract
    The width dependence to the interfacial effect of mis-matching characteristics of a boron doped non-silicided polysilicon resistor has been studied. The fundamental properties for using P+ poly resistor in the integrated circuit(IC) design are better linearity and higher unit square sheet resistance. Typically, the square resistance of a boron doped non-silicided poly-silicon resistors is 30 times higher than the one of a silicided poly-silicon resistor. By using the 0.18 mum CMOS fabrication technology, the boron doped P+-poly-silicon resistor is built in this paper. Based on a simple and useful empirical model, the equivalent circuit parameters of the P+ poly-silicon resistor that include bulk sheet resistance (Rs), interface resistance (Rinterface) silicide resistance (Rinterface) and contact resistance (Rc) are obtained as described in the research on references. The references´ study already showed that the Rs and Rinterface values are increased with the decrease of resistor width and are decreased with the increase of temperature, respectively. However, most of analog related designs, such as ADC (analog to digital converter) and DAC (digital to analog converter) have to use the resistor with large device size in the integrated circuit design for obtaining better circuit performance such as resolution and accuracy during signal conversion. This research is firstly to disclose the P+-poly resistor mis-matching effects by distinguishing the role of each equivalent circuit parameters, and explain the limiting factor to use P+-poly silicon resistor in terms of device sizes, such as width and length, and provide a minimum size of P+ poly resistor to use for the circuit designer. Besides focusing on the dimension variation for the width and length of the resistor to mis-matching performance, the interface effect of the P+-poly-silicon resistor itself is demonstrated 60% higher than the other effect for the study of this work.
  • Keywords
    CMOS integrated circuits; boron; cobalt compounds; equivalent circuits; integrated circuit design; resistors; silicon; ADC; CMOS fabrication technology; CMOS process technology; DAC; Si:B; analog related designs; analog-to-digital converter; boron doped nonsilicided polysilicon resistor; bulk sheet resistance; contact resistance; digital-to-analog converter; equivalent circuit parameters; integrated circuit design; interface resistance; interfacial effect; mismatching characteristics; silicide resistance; size 0.18 mum; Boron; CMOS process; CMOS technology; Contact resistance; Equivalent circuits; Fabrication; Integrated circuit technology; Linearity; Resistors; Semiconductor device modeling; Boron doped resistor; CMOS process technology; Cobalt silicide; Interfacial resistance; Linearity; MOSFET; Mis-matching; Poly-silicon resistor;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
  • Conference_Location
    Tainan
  • Print_ISBN
    978-1-4244-0637-1
  • Electronic_ISBN
    978-1-4244-0637-1
  • Type

    conf

  • DOI
    10.1109/EDSSC.2007.4450328
  • Filename
    4450328