FPGA implementation of tabu search for the quadratic assignment problem

In this paper, we propose an FPGA implementation of tabu search to solve the quadratic assignment problem in a short execution time. In the proposed hardware implementation of tabu search, multiple neighbor solutions are evaluated in parallel and each solution is evaluated in a pipeline fashion. The proposed method effectively utilizes internal block RAMs of recent large scale FPGAs. Experimental results show the efficiency and effectiveness of the proposed method