A 1.2-V, 5.8-mW, Ultra-Wideband Folded Mixer in 0.13-μm CMOS

This paper presents the design and analysis of a low-voltage downconversion mixer in 0.13-mum CMOS for UWB applications between 3-7 GHz. To facilitate low-voltage operation with 0.8-1.2-V supply, the mixer employs a folded Gilbert cell topology with PMOS devices for LO switches and utilizes on-chip broadband RF chokes for biasing. The folded toplogy allows the transconductance and LO stages to have different bias current. By setting the bias current in the PMOS switches near zero, the mixer DC offset due to device mismatch is greatly reduced The effect of supply voltage on the mixer performance is studied. The mixer consumes 2.5 and 5.8 mW from a 0.8-V and 1.2-V supply, respectively. Under a 1.2-V supply, the mixer achieves a voltage conversion gain (CG) of 5.3-8.2 dB, a single-sideband noise figure (NF) of 9.6-13.5 dB, a second-order intermodualtion intercept point (IIP2) of 37.3-43.4 dBm, and a third-order intermodualtion intercept point (IIP3) of -3.2 to -0.3 dBm between 3-7 GHz. The DC offset of the mixer is measured systematically to isolate the contributions due to device mismatch, LO self-mixing, and second-order intermodulation. The typical measured DC offset ranges from 2.4 to 4.3 mV.